The present invention relates to a method and an arrangement for synchronizing a receiver for digital signals with transmission of a special preamble selected in such a manner that, with correct demodulation, the received signal has a cosine shape with a pattern frequency fp from which the clock pulse frequency results, and wherein the frequency and/or phase of the carrier and clock pulse signal, respectively, are estimated.
In conventional digital transmission systems, the problem of clock pulse and carrier synchronization is solved by means of feedback connected control loops. The advantage of such a solution lies in the low expenditures required.
For modern burst transmission systems, however, very short acquisition times are needed which can usually not be maintained with feedback connected control loops. Therefore fast estimation processes become very important for the initial synchronization.
In an article by Viterbi, entitled "Nonlinear Estimation of PSK Modulated Carrier Phase with Application To Burst Digital Transmission", IEEE Transactions on Information Theory, Volume IT-29, No. 4, July, 1983, a method is presented for estimating the carrier phase in an m-PSK transmission. An article entitled "Maximum Likelihood Detection and Synchronization by Parallel Digital Signal Processing" by Ascheid and Meyr, 1984, IEEE, Globecom, pages 1068 et seq. describes a method for parallel estimation of clock pulse and carrier phase in modulation methods employing constant envelope curves.
For the case of a specifically transmitted preamble, an article entitled "A Microprocessor-Based PSK Modem for Packet Transmission Over Satellite Channels" by Heegard et al, IEEE Transactions on Communications, Vol. Com-26, No. 5, May, 1978, pages 552 et seq., discloses a possibility for estimating carrier frequency, carrier phase and clock pulse phase for initial synchronization. This process results only in a relatively rough estimate of the clock pulse phase, with a limited frequency offset being neglected.